1. Field of the Invention
The present invention relates to nanocrystal silicon layer structures formed using a plasma deposition technique, methods of forming the same, nonvolatile memory devices including the nanocrystal silicon layer structures, and methods of fabricating the nonvolatile memory devices, and more particularly, to nonvolatile memory devices including nanocrystal silicon layer structures formed on a glass substrate and methods of fabricating nonvolatile memory devices which can be formed at a low temperature and driven at a low voltage.
2. Discussion of Related Art
In general, nonvolatile memory devices may be categorized as either a NAND type or a NOR type depending on the construction and operation of a cell. Alternatively, nonvolatile memory devices may be classified into a floating-gate memory device, a metal-oxide-nitride-oxide-semiconductor (MONOS) memory device, or a silicon-oxide-nitride-oxide-semiconductor (SONOS) memory device depending on the type of a charge storage layer material used for a unit cell. The floating-gate memory device performs memory functions using a potential well, and the MONOS and SONOS memory devices perform memory functions using a trap site present in a bulk of a silicon-nitride dielectric layer or in an interface between dielectric layers. The MONOS memory device includes a control gate formed of a metal, while the SONOS memory device includes a control gate formed of polysilicon (poly-Si).
When compared with the floating-gate nonvolatile memory device, the SONOS and MONOS memory devices may be easily scaled down and have higher endurance and more uniform threshold-voltage distribution.
Hereinafter, conventional nonvolatile memory devices will be described with reference to FIGS. 1A and 1B. FIGS. 1A and 1B are cross-sectional views of conventional nonvolatile memory devices formed on a semiconductor substrate and a glass substrate, respectively.
Referring to FIG. 1A, an example of a conventional nonvolatile memory device includes a first oxide layer 2, a nitride layer 3, and a second oxide layer 4 that are sequentially stacked on a semiconductor substrate 1. A gate electrode 5 is formed on the second oxide layer 4, and a source region 6 and a drain region 7 are respectively formed in the semiconductor substrate 1 at both sides of the gate electrode 5.
The first oxide layer 2 functions to allow electrons to tunnel into a trap region of the nitride layer 3 or a trap region between the first oxide layer 2 and the nitride layer 3. The second oxide layer 4 blocks the transport of charges between the nitride layer 3 and the gate electrode 5. The nitride layer 3 stores charges in the trap region thereof or the trap region between the first oxide layer 2 and the nitride layer 3.
Referring to FIG. 1B, another example of a conventional nonvolatile memory device includes a buffer oxide layer 9 formed on a glass substrate 8 to protect the glass substrate 8. An amorphous silicon (a-Si) layer is formed on the buffer oxide layer 9 using a plasma-enhanced chemical vapor deposition (PECVD) technique. The a-Si layer is irradiated with laser beams and crystallized into a poly-Si layer 10.
Thereafter, a first oxide layer 11, a nitride layer 12, a second oxide layer 13, and a gate electrode 14 are sequentially formed on the poly-Si layer 10. The surface of the poly-Si layer 10 is heavily doped with impurity ions at both sides of the gate electrode 14, thereby forming a source region 15 and a drain region 16. However, since the poly-Si layer 10 has a very rough, nonuniform surface, when the nonvolatile memory device is fabricated on the glass substrate 8, a leakage current characteristic may deteriorate. As a result, the nonvolatile memory device cannot properly perform program/erase operations.
In order to solve this problem, Korean Patent Registration No. 0719680 dated May 11, 2007 by Byeong-deok Choi et al discloses a nonvolatile memory device including a buffer oxide layer, a poly-Si layer, a silicon oxynitride layer, a first insulating layer, a nitride layer, a second insulating layer, and a metal electrode that are sequentially stacked on a glass substrate. The silicon oxynitride layer is obtained by modifying a rough top surface of the poly-Si layer using nitrous oxide (N2O) plasma. Accordingly, the disclosed nonvolatile memory device may prevent an excessive leakage current from occurring due to the rough, nonuniform surface of the poly-Si layer, which results from irradiation of an a-Si layer with laser beams.
However, in the nonvolatile memory device disclosed in Korean Patent Registration No. 0719680, the formation of the poly-Si layer involves forming an a-Si layer on the buffer layer and crystallizing the a-Si layer using an excimer laser annealing (ELA) process or a solid-phase crystallization (SPC) process. As a result, the fabrication of the nonvolatile memory device becomes more complicated and expensive.